1 | // bcm2835.h |
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2 | // |
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3 | // C and C++ support for Broadcom BCM 2835 as used in Raspberry Pi |
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4 | // |
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5 | // Author: Mike McCauley |
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6 | // Copyright (C) 2011-2013 Mike McCauley |
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7 | // $Id: bcm2835.h,v 1.13 2013/12/06 22:24:52 mikem Exp mikem $ |
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8 | // |
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9 | /// \mainpage C library for Broadcom BCM 2835 as used in Raspberry Pi |
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10 | /// |
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11 | /// This is a C library for Raspberry Pi (RPi). It provides access to |
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12 | /// GPIO and other IO functions on the Broadcom BCM 2835 chip, |
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13 | /// allowing access to the GPIO pins on the |
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14 | /// 26 pin IDE plug on the RPi board so you can control and interface with various external devices. |
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15 | /// |
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16 | /// It provides functions for reading digital inputs and setting digital outputs, using SPI and I2C, |
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17 | /// and for accessing the system timers. |
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18 | /// Pin event detection is supported by polling (interrupts are not supported). |
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19 | /// |
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20 | /// It is C++ compatible, and installs as a header file and non-shared library on |
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21 | /// any Linux-based distro (but clearly is no use except on Raspberry Pi or another board with |
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22 | /// BCM 2835). |
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23 | /// |
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24 | /// The version of the package that this documentation refers to can be downloaded |
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25 | /// from http://www.airspayce.com/mikem/bcm2835/bcm2835-1.36.tar.gz |
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26 | /// You can find the latest version at http://www.airspayce.com/mikem/bcm2835 |
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27 | /// |
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28 | /// Several example programs are provided. |
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29 | /// |
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30 | /// Based on data in http://elinux.org/RPi_Low-level_peripherals and |
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31 | /// http://www.raspberrypi.org/wp-content/uploads/2012/02/BCM2835-ARM-Peripherals.pdf |
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32 | /// and http://www.scribd.com/doc/101830961/GPIO-Pads-Control2 |
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33 | /// |
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34 | /// You can also find online help and discussion at http://groups.google.com/group/bcm2835 |
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35 | /// Please use that group for all questions and discussions on this topic. |
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36 | /// Do not contact the author directly, unless it is to discuss commercial licensing. |
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37 | /// |
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38 | /// Tested on debian6-19-04-2012, 2012-07-15-wheezy-raspbian, 2013-07-26-wheezy-raspbian |
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39 | /// and Occidentalisv01 |
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40 | /// CAUTION: it has been observed that when detect enables such as bcm2835_gpio_len() |
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41 | /// are used and the pin is pulled LOW |
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42 | /// it can cause temporary hangs on 2012-07-15-wheezy-raspbian, 2013-07-26-wheezy-raspbian |
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43 | /// and Occidentalisv01. |
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44 | /// Reason for this is not yet determined, but we suspect that an interrupt handler is |
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45 | /// hitting a hard loop on those OSs. |
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46 | /// If you must use bcm2835_gpio_len() and friends, make sure you disable the pins with |
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47 | /// bcm2835_gpio_clr_len() and friends after use. |
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48 | /// |
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49 | /// \par Installation |
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50 | /// |
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51 | /// This library consists of a single non-shared library and header file, which will be |
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52 | /// installed in the usual places by make install |
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53 | /// |
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54 | /// \code |
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55 | /// # download the latest version of the library, say bcm2835-1.xx.tar.gz, then: |
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56 | /// tar zxvf bcm2835-1.xx.tar.gz |
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57 | /// cd bcm2835-1.xx |
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58 | /// ./configure |
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59 | /// make |
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60 | /// sudo make check |
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61 | /// sudo make install |
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62 | /// \endcode |
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63 | /// |
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64 | /// \par Physical Addresses |
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65 | /// |
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66 | /// The functions bcm2835_peri_read(), bcm2835_peri_write() and bcm2835_peri_set_bits() |
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67 | /// are low level peripheral register access functions. They are designed to use |
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68 | /// physical addresses as described in section 1.2.3 ARM physical addresses |
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69 | /// of the BCM2835 ARM Peripherals manual. |
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70 | /// Physical addresses range from 0x20000000 to 0x20FFFFFF for peripherals. The bus |
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71 | /// addresses for peripherals are set up to map onto the peripheral bus address range starting at |
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72 | /// 0x7E000000. Thus a peripheral advertised in the manual at bus address 0x7Ennnnnn is available at |
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73 | /// physical address 0x20nnnnnn. |
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74 | /// |
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75 | /// The base address of the various peripheral registers are available with the following |
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76 | /// externals: |
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77 | /// bcm2835_gpio |
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78 | /// bcm2835_pwm |
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79 | /// bcm2835_clk |
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80 | /// bcm2835_pads |
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81 | /// bcm2835_spio0 |
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82 | /// bcm2835_st |
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83 | /// bcm2835_bsc0 |
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84 | /// bcm2835_bsc1 |
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85 | /// |
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86 | /// \par Pin Numbering |
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87 | /// |
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88 | /// The GPIO pin numbering as used by RPi is different to and inconsistent with the underlying |
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89 | /// BCM 2835 chip pin numbering. http://elinux.org/RPi_BCM2835_GPIOs |
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90 | /// |
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91 | /// RPi has a 26 pin IDE header that provides access to some of the GPIO pins on the BCM 2835, |
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92 | /// as well as power and ground pins. Not all GPIO pins on the BCM 2835 are available on the |
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93 | /// IDE header. |
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94 | /// |
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95 | /// RPi Version 2 also has a P5 connector with 4 GPIO pins, 5V, 3.3V and Gnd. |
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96 | /// |
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97 | /// The functions in this library are designed to be passed the BCM 2835 GPIO pin number and _not_ |
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98 | /// the RPi pin number. There are symbolic definitions for each of the available pins |
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99 | /// that you should use for convenience. See \ref RPiGPIOPin. |
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100 | /// |
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101 | /// \par SPI Pins |
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102 | /// |
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103 | /// The bcm2835_spi_* functions allow you to control the BCM 2835 SPI0 interface, |
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104 | /// allowing you to send and received data by SPI (Serial Peripheral Interface). |
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105 | /// For more information about SPI, see http://en.wikipedia.org/wiki/Serial_Peripheral_Interface_Bus |
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106 | /// |
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107 | /// When bcm2835_spi_begin() is called it changes the bahaviour of the SPI interface pins from their |
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108 | /// default GPIO behaviour in order to support SPI. While SPI is in use, you will not be able |
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109 | /// to control the state of the SPI pins through the usual bcm2835_spi_gpio_write(). |
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110 | /// When bcm2835_spi_end() is called, the SPI pins will all revert to inputs, and can then be |
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111 | /// configured and controled with the usual bcm2835_gpio_* calls. |
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112 | /// |
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113 | /// The Raspberry Pi GPIO pins used for SPI are: |
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114 | /// |
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115 | /// - P1-19 (MOSI) |
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116 | /// - P1-21 (MISO) |
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117 | /// - P1-23 (CLK) |
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118 | /// - P1-24 (CE0) |
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119 | /// - P1-26 (CE1) |
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120 | /// |
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121 | /// \par I2C Pins |
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122 | /// |
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123 | /// The bcm2835_i2c_* functions allow you to control the BCM 2835 BSC interface, |
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124 | /// allowing you to send and received data by I2C ("eye-squared cee"; generically referred to as "two-wire interface") . |
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125 | /// For more information about I?C, see http://en.wikipedia.org/wiki/I%C2%B2C |
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126 | /// |
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127 | /// The Raspberry Pi V2 GPIO pins used for I2C are: |
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128 | /// |
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129 | /// - P1-03 (SDA) |
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130 | /// - P1-05 (SLC) |
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131 | /// |
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132 | /// \par PWM |
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133 | /// |
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134 | /// The BCM2835 supports hardware PWM on a limited subset of GPIO pins. This bcm2835 library provides |
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135 | /// functions for configuring and controlling PWM output on these pins. |
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136 | /// |
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137 | /// The BCM2835 contains 2 independent PWM channels (0 and 1), each of which be connnected to a limited subset of |
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138 | /// GPIO pins. The following GPIO pins may be connected to the following PWM channels (from section 9.5): |
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139 | /// \code |
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140 | /// GPIO PIN RPi pin PWM Channel ALT FUN |
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141 | /// 12 0 0 |
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142 | /// 13 1 0 |
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143 | /// 18 1-12 0 5 |
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144 | /// 19 1 5 |
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145 | /// 40 0 0 |
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146 | /// 41 1 0 |
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147 | /// 45 1 0 |
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148 | /// 52 0 1 |
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149 | /// 53 1 1 |
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150 | /// \endcode |
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151 | /// In order for a GPIO pin to emit output from its PWM channel, it must be set to the Alt Function given above. |
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152 | /// Note carefully that current versions of the Raspberry Pi only expose one of these pins (GPIO 18 = RPi Pin 1-12) |
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153 | /// on the IO headers, and therefore this is the only IO pin on the RPi that can be used for PWM. |
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154 | /// Further it must be set to ALT FUN 5 to get PWM output. |
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155 | /// |
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156 | /// Both PWM channels are driven by the same PWM clock, whose clock dvider can be varied using |
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157 | /// bcm2835_pwm_set_clock(). Each channel can be separately enabled with bcm2835_pwm_set_mode(). |
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158 | /// The average output of the PWM channel is determined by the ratio of DATA/RANGE for that channel. |
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159 | /// Use bcm2835_pwm_set_range() to set the range and bcm2835_pwm_set_data() to set the data in that ratio |
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160 | /// |
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161 | /// Each PWM channel can run in either Balanced or Mark-Space mode. In Balanced mode, the hardware |
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162 | /// sends a combination of clock pulses that results in an overall DATA pulses per RANGE pulses. |
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163 | /// In Mark-Space mode, the hardware sets the output HIGH for DATA clock pulses wide, followed by |
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164 | /// LOW for RANGE-DATA clock pulses. |
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165 | /// |
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166 | /// The PWM clock can be set to control the PWM pulse widths. The PWM clock is derived from |
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167 | /// a 19.2MHz clock. You can set any divider, but some common ones are provided by the BCM2835_PWM_CLOCK_DIVIDER_* |
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168 | /// values of \ref bcm2835PWMClockDivider. |
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169 | /// |
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170 | /// For example, say you wanted to drive a DC motor with PWM at about 1kHz, |
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171 | /// and control the speed in 1/1024 increments from |
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172 | /// 0/1024 (stopped) through to 1024/1024 (full on). In that case you might set the |
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173 | /// clock divider to be 16, and the RANGE to 1024. The pulse repetition frequency will be |
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174 | /// 1.2MHz/1024 = 1171.875Hz. |
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175 | /// |
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176 | /// \par Real Time performance constraints |
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177 | /// |
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178 | /// The bcm2835 is a library for user programs (i.e. they run in 'userland'). |
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179 | /// Such programs are not part of the kernel and are usually |
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180 | /// subject to paging and swapping by the kernel while it does other things besides running your program. |
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181 | /// This means that you should not expect to get real-time performance or |
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182 | /// real-time timing constraints from such programs. In particular, there is no guarantee that the |
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183 | /// bcm2835_delay() and bcm2835_delayMicroseconds() will return after exactly the time requested. |
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184 | /// In fact, depending on other activity on the host, IO etc, you might get significantly longer delay times |
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185 | /// than the one you asked for. So please dont expect to get exactly the time delay you request. |
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186 | /// |
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187 | /// Arjan reports that you can prevent swapping on Linux with the following code fragment: |
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188 | /// |
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189 | /// \code |
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190 | /// struct sched_param sp; |
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191 | /// memset(&sp, 0, sizeof(sp)); |
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192 | /// sp.sched_priority = sched_get_priority_max(SCHED_FIFO); |
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193 | /// sched_setscheduler(0, SCHED_FIFO, &sp); |
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194 | /// mlockall(MCL_CURRENT | MCL_FUTURE); |
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195 | /// \endcode |
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196 | /// |
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197 | /// \par Bindings to other languages |
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198 | /// |
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199 | /// mikem has made Perl bindings available at CPAN: |
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200 | /// http://search.cpan.org/~mikem/Device-BCM2835-1.9/lib/Device/BCM2835.pm |
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201 | /// Matthew Baker has kindly made Python bindings available at: |
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202 | /// https://github.com/mubeta06/py-libbcm2835 |
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203 | /// Gary Marks has created a Serial Peripheral Interface (SPI) command-line utility |
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204 | /// for Raspberry Pi, based on the bcm2835 library. The |
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205 | /// utility, spincl, is licensed under Open Source GNU GPLv3 by iP Solutions (http://ipsolutionscorp.com), as a |
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206 | /// free download with source included: http://ipsolutionscorp.com/raspberry-pi-spi-utility/ |
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207 | /// |
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208 | /// \par Open Source Licensing GPL V2 |
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209 | /// |
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210 | /// This is the appropriate option if you want to share the source code of your |
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211 | /// application with everyone you distribute it to, and you also want to give them |
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212 | /// the right to share who uses it. If you wish to use this software under Open |
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213 | /// Source Licensing, you must contribute all your source code to the open source |
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214 | /// community in accordance with the GPL Version 2 when your application is |
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215 | /// distributed. See http://www.gnu.org/copyleft/gpl.html and COPYING |
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216 | /// |
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217 | /// \par Acknowledgements |
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218 | /// |
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219 | /// Some of this code has been inspired by Dom and Gert. |
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220 | /// The I2C code has been inspired by Alan Barr. |
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221 | /// |
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222 | /// \par Revision History |
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223 | /// |
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224 | /// \version 1.0 Initial release |
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225 | /// \version 1.1 Minor bug fixes |
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226 | /// \version 1.2 Added support for SPI |
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227 | /// \version 1.3 Added bcm2835_spi_transfern() |
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228 | /// \version 1.4 Fixed a problem that prevented SPI CE1 being used. Reported by David Robinson. |
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229 | /// \version 1.5 Added bcm2835_close() to deinit the library. Suggested by C?sar Ortiz |
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230 | /// \version 1.6 Document testing on 2012-07-15-wheezy-raspbian and Occidentalisv01 |
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231 | /// Functions bcm2835_gpio_ren(), bcm2835_gpio_fen(), bcm2835_gpio_hen() |
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232 | /// bcm2835_gpio_len(), bcm2835_gpio_aren() and bcm2835_gpio_afen() now |
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233 | /// changes only the pin specified. Other pins that were already previously |
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234 | /// enabled stay enabled. |
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235 | /// Added bcm2835_gpio_clr_ren(), bcm2835_gpio_clr_fen(), bcm2835_gpio_clr_hen() |
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236 | /// bcm2835_gpio_clr_len(), bcm2835_gpio_clr_aren(), bcm2835_gpio_clr_afen() |
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237 | /// to clear the enable for individual pins, suggested by Andreas Sundstrom. |
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238 | /// \version 1.7 Added bcm2835_spi_transfernb to support different buffers for read and write. |
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239 | /// \version 1.8 Improvements to read barrier, as suggested by maddin. |
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240 | /// \version 1.9 Improvements contributed by mikew: |
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241 | /// I noticed that it was mallocing memory for the mmaps on /dev/mem. |
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242 | /// It's not necessary to do that, you can just mmap the file directly, |
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243 | /// so I've removed the mallocs (and frees). |
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244 | /// I've also modified delayMicroseconds() to use nanosleep() for long waits, |
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245 | /// and a busy wait on a high resolution timer for the rest. This is because |
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246 | /// I've found that calling nanosleep() takes at least 100-200 us. |
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247 | /// You need to link using '-lrt' using this version. |
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248 | /// I've added some unsigned casts to the debug prints to silence compiler |
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249 | /// warnings I was getting, fixed some typos, and changed the value of |
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250 | /// BCM2835_PAD_HYSTERESIS_ENABLED to 0x08 as per Gert van Loo's doc at |
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251 | /// http://www.scribd.com/doc/101830961/GPIO-Pads-Control2 |
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252 | /// Also added a define for the passwrd value that Gert says is needed to |
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253 | /// change pad control settings. |
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254 | /// \version 1.10 Changed the names of the delay functions to bcm2835_delay() |
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255 | /// and bcm2835_delayMicroseconds() to prevent collisions with wiringPi. |
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256 | /// Macros to map delay()-> bcm2835_delay() and |
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257 | /// Macros to map delayMicroseconds()-> bcm2835_delayMicroseconds(), which |
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258 | /// can be disabled by defining BCM2835_NO_DELAY_COMPATIBILITY |
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259 | /// \version 1.11 Fixed incorrect link to download file |
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260 | /// \version 1.12 New GPIO pin definitions for RPi version 2 (which has a different GPIO mapping) |
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261 | /// \version 1.13 New GPIO pin definitions for RPi version 2 plug P5 |
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262 | /// Hardware base pointers are now available (after initialisation) externally as bcm2835_gpio |
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263 | /// bcm2835_pwm bcm2835_clk bcm2835_pads bcm2835_spi0. |
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264 | /// \version 1.14 Now compiles even if CLOCK_MONOTONIC_RAW is not available, uses CLOCK_MONOTONIC instead. |
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265 | /// Fixed errors in documentation of SPI divider frequencies based on 250MHz clock. |
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266 | /// Reported by Ben Simpson. |
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267 | /// \version 1.15 Added bcm2835_close() to end of examples as suggested by Mark Wolfe. |
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268 | /// \version 1.16 Added bcm2835_gpio_set_multi, bcm2835_gpio_clr_multi and bcm2835_gpio_write_multi |
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269 | /// to allow a mask of pins to be set all at once. Requested by Sebastian Loncar. |
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270 | /// \version 1.17 Added bcm2835_gpio_write_mask. Requested by Sebastian Loncar. |
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271 | /// \version 1.18 Added bcm2835_i2c_* functions. Changes to bcm2835_delayMicroseconds: |
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272 | /// now uses the RPi system timer counter, instead of clock_gettime, for improved accuracy. |
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273 | /// No need to link with -lrt now. Contributed by Arjan van Vught. |
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274 | /// \version 1.19 Removed inlines added by previous patch since they don't seem to work everywhere. |
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275 | /// Reported by olly. |
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276 | /// \version 1.20 Patch from Mark Dootson to close /dev/mem after access to the peripherals has been granted. |
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277 | /// \version 1.21 delayMicroseconds is now not susceptible to 32 bit timer overruns. |
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278 | /// Patch courtesy Jeremy Mortis. |
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279 | /// \version 1.22 Fixed incorrect definition of BCM2835_GPFEN0 which broke the ability to set |
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280 | /// falling edge events. Reported by Mark Dootson. |
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281 | /// \version 1.23 Added bcm2835_i2c_set_baudrate and bcm2835_i2c_read_register_rs. |
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282 | /// Improvements to bcm2835_i2c_read and bcm2835_i2c_write functions |
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283 | /// to fix ocasional reads not completing. Patched by Mark Dootson. |
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284 | /// \version 1.24 Mark Dootson p[atched a problem with his previously submitted code |
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285 | /// under high load from other processes. |
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286 | /// \version 1.25 Updated author and distribution location details to airspayce.com |
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287 | /// \version 1.26 Added missing unmapmem for pads in bcm2835_close to prevent a memory leak. |
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288 | /// Reported by Hartmut Henkel. |
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289 | /// \version 1.27 bcm2835_gpio_set_pad() no longer needs BCM2835_PAD_PASSWRD: it is |
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290 | /// now automatically included. |
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291 | /// Added suport for PWM mode with bcm2835_pwm_* functions. |
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292 | /// \version 1.28 Fixed a problem where bcm2835_spi_writenb() would have problems with transfers of more than |
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293 | /// 64 bytes dues to read buffer filling. Patched by Peter Würtz. |
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294 | /// \version 1.29 Further fix to SPI from Peter Würtz. |
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295 | /// \version 1.30 10 microsecond delays from bcm2835_spi_transfer and bcm2835_spi_transfern for |
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296 | /// significant performance improvements, Patch by Alan Watson. |
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297 | /// \version 1.31 Fix a GCC warning about dummy variable, patched by Alan Watson. Thanks. |
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298 | /// \version 1.32 Added option I2C_V1 definition to compile for version 1 RPi. |
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299 | /// By default I2C code is generated for the V2 RPi which has SDA1 and SCL1 connected. |
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300 | /// Contributed by Malcolm Wiles based on work by Arvi Govindaraj. |
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301 | /// \version 1.33 Added command line utilities i2c and gpio to examples. Contributed by Shahrooz Shahparnia. |
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302 | /// \version 1.34 Added bcm2835_i2c_write_read_rs() which writes an arbitrary number of bytes, |
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303 | /// sends a repeat start, and reads from the device. Contributed by Eduardo Steinhorst. |
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304 | /// \version 1.35 Fix build errors when compiled under Qt. Also performance improvements with SPI transfers. Contributed by Udo Klaas. |
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305 | /// \version 1.36 Make automake's test runner detect that we're skipping tests when not root, the second |
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306 | /// one makes us skip the test when using fakeroot (as used when building |
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307 | /// Debian packages). Contributed by Guido Günther. |
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308 | /// |
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309 | /// \author Mike McCauley (mikem@airspayce.com) DO NOT CONTACT THE AUTHOR DIRECTLY: USE THE LISTS |
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310 | |
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311 | |
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312 | |
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313 | // Defines for BCM2835 |
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314 | #ifndef BCM2835_H |
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315 | #define BCM2835_H |
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316 | |
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317 | #include <stdint.h> |
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318 | |
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319 | /// \defgroup constants Constants for passing to and from library functions |
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320 | /// The values here are designed to be passed to various functions in the bcm2835 library. |
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321 | /// @{ |
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322 | |
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323 | |
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324 | /// This means pin HIGH, true, 3.3volts on a pin. |
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325 | #define HIGH 0x1 |
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326 | /// This means pin LOW, false, 0volts on a pin. |
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327 | #define LOW 0x0 |
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328 | |
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329 | /// Speed of the core clock core_clk |
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330 | #define BCM2835_CORE_CLK_HZ 250000000 ///< 250 MHz |
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331 | |
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332 | // Physical addresses for various peripheral register sets |
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333 | /// Base Physical Address of the BCM 2835 peripheral registers |
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334 | #define BCM2835_PERI_BASE 0x20000000 |
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335 | /// Base Physical Address of the System Timer registers |
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336 | #define BCM2835_ST_BASE (BCM2835_PERI_BASE + 0x3000) |
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337 | /// Base Physical Address of the Pads registers |
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338 | #define BCM2835_GPIO_PADS (BCM2835_PERI_BASE + 0x100000) |
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339 | /// Base Physical Address of the Clock/timer registers |
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340 | #define BCM2835_CLOCK_BASE (BCM2835_PERI_BASE + 0x101000) |
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341 | /// Base Physical Address of the GPIO registers |
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342 | #define BCM2835_GPIO_BASE (BCM2835_PERI_BASE + 0x200000) |
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343 | /// Base Physical Address of the SPI0 registers |
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344 | #define BCM2835_SPI0_BASE (BCM2835_PERI_BASE + 0x204000) |
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345 | /// Base Physical Address of the BSC0 registers |
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346 | #define BCM2835_BSC0_BASE (BCM2835_PERI_BASE + 0x205000) |
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347 | /// Base Physical Address of the PWM registers |
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348 | #define BCM2835_GPIO_PWM (BCM2835_PERI_BASE + 0x20C000) |
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349 | /// Base Physical Address of the BSC1 registers |
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350 | #define BCM2835_BSC1_BASE (BCM2835_PERI_BASE + 0x804000) |
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351 | |
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352 | |
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353 | /// Base of the ST (System Timer) registers. |
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354 | /// Available after bcm2835_init has been called |
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355 | extern volatile uint32_t *bcm2835_st; |
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356 | |
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357 | /// Base of the GPIO registers. |
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358 | /// Available after bcm2835_init has been called |
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359 | extern volatile uint32_t *bcm2835_gpio; |
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360 | |
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361 | /// Base of the PWM registers. |
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362 | /// Available after bcm2835_init has been called |
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363 | extern volatile uint32_t *bcm2835_pwm; |
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364 | |
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365 | /// Base of the CLK registers. |
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366 | /// Available after bcm2835_init has been called |
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367 | extern volatile uint32_t *bcm2835_clk; |
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368 | |
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369 | /// Base of the PADS registers. |
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370 | /// Available after bcm2835_init has been called |
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371 | extern volatile uint32_t *bcm2835_pads; |
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372 | |
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373 | /// Base of the SPI0 registers. |
---|
374 | /// Available after bcm2835_init has been called |
---|
375 | extern volatile uint32_t *bcm2835_spi0; |
---|
376 | |
---|
377 | /// Base of the BSC0 registers. |
---|
378 | /// Available after bcm2835_init has been called |
---|
379 | extern volatile uint32_t *bcm2835_bsc0; |
---|
380 | |
---|
381 | /// Base of the BSC1 registers. |
---|
382 | /// Available after bcm2835_init has been called |
---|
383 | extern volatile uint32_t *bcm2835_bsc1; |
---|
384 | |
---|
385 | /// Size of memory page on RPi |
---|
386 | #define BCM2835_PAGE_SIZE (4*1024) |
---|
387 | /// Size of memory block on RPi |
---|
388 | #define BCM2835_BLOCK_SIZE (4*1024) |
---|
389 | |
---|
390 | |
---|
391 | // Defines for GPIO |
---|
392 | // The BCM2835 has 54 GPIO pins. |
---|
393 | // BCM2835 data sheet, Page 90 onwards. |
---|
394 | /// GPIO register offsets from BCM2835_GPIO_BASE. Offsets into the GPIO Peripheral block in bytes per 6.1 Register View |
---|
395 | #define BCM2835_GPFSEL0 0x0000 ///< GPIO Function Select 0 |
---|
396 | #define BCM2835_GPFSEL1 0x0004 ///< GPIO Function Select 1 |
---|
397 | #define BCM2835_GPFSEL2 0x0008 ///< GPIO Function Select 2 |
---|
398 | #define BCM2835_GPFSEL3 0x000c ///< GPIO Function Select 3 |
---|
399 | #define BCM2835_GPFSEL4 0x0010 ///< GPIO Function Select 4 |
---|
400 | #define BCM2835_GPFSEL5 0x0014 ///< GPIO Function Select 5 |
---|
401 | #define BCM2835_GPSET0 0x001c ///< GPIO Pin Output Set 0 |
---|
402 | #define BCM2835_GPSET1 0x0020 ///< GPIO Pin Output Set 1 |
---|
403 | #define BCM2835_GPCLR0 0x0028 ///< GPIO Pin Output Clear 0 |
---|
404 | #define BCM2835_GPCLR1 0x002c ///< GPIO Pin Output Clear 1 |
---|
405 | #define BCM2835_GPLEV0 0x0034 ///< GPIO Pin Level 0 |
---|
406 | #define BCM2835_GPLEV1 0x0038 ///< GPIO Pin Level 1 |
---|
407 | #define BCM2835_GPEDS0 0x0040 ///< GPIO Pin Event Detect Status 0 |
---|
408 | #define BCM2835_GPEDS1 0x0044 ///< GPIO Pin Event Detect Status 1 |
---|
409 | #define BCM2835_GPREN0 0x004c ///< GPIO Pin Rising Edge Detect Enable 0 |
---|
410 | #define BCM2835_GPREN1 0x0050 ///< GPIO Pin Rising Edge Detect Enable 1 |
---|
411 | #define BCM2835_GPFEN0 0x0058 ///< GPIO Pin Falling Edge Detect Enable 0 |
---|
412 | #define BCM2835_GPFEN1 0x005c ///< GPIO Pin Falling Edge Detect Enable 1 |
---|
413 | #define BCM2835_GPHEN0 0x0064 ///< GPIO Pin High Detect Enable 0 |
---|
414 | #define BCM2835_GPHEN1 0x0068 ///< GPIO Pin High Detect Enable 1 |
---|
415 | #define BCM2835_GPLEN0 0x0070 ///< GPIO Pin Low Detect Enable 0 |
---|
416 | #define BCM2835_GPLEN1 0x0074 ///< GPIO Pin Low Detect Enable 1 |
---|
417 | #define BCM2835_GPAREN0 0x007c ///< GPIO Pin Async. Rising Edge Detect 0 |
---|
418 | #define BCM2835_GPAREN1 0x0080 ///< GPIO Pin Async. Rising Edge Detect 1 |
---|
419 | #define BCM2835_GPAFEN0 0x0088 ///< GPIO Pin Async. Falling Edge Detect 0 |
---|
420 | #define BCM2835_GPAFEN1 0x008c ///< GPIO Pin Async. Falling Edge Detect 1 |
---|
421 | #define BCM2835_GPPUD 0x0094 ///< GPIO Pin Pull-up/down Enable |
---|
422 | #define BCM2835_GPPUDCLK0 0x0098 ///< GPIO Pin Pull-up/down Enable Clock 0 |
---|
423 | #define BCM2835_GPPUDCLK1 0x009c ///< GPIO Pin Pull-up/down Enable Clock 1 |
---|
424 | |
---|
425 | /// \brief bcm2835PortFunction |
---|
426 | /// Port function select modes for bcm2835_gpio_fsel() |
---|
427 | typedef enum |
---|
428 | { |
---|
429 | BCM2835_GPIO_FSEL_INPT = 0b000, ///< Input |
---|
430 | BCM2835_GPIO_FSEL_OUTP = 0b001, ///< Output |
---|
431 | BCM2835_GPIO_FSEL_ALT0 = 0b100, ///< Alternate function 0 |
---|
432 | BCM2835_GPIO_FSEL_ALT1 = 0b101, ///< Alternate function 1 |
---|
433 | BCM2835_GPIO_FSEL_ALT2 = 0b110, ///< Alternate function 2 |
---|
434 | BCM2835_GPIO_FSEL_ALT3 = 0b111, ///< Alternate function 3 |
---|
435 | BCM2835_GPIO_FSEL_ALT4 = 0b011, ///< Alternate function 4 |
---|
436 | BCM2835_GPIO_FSEL_ALT5 = 0b010, ///< Alternate function 5 |
---|
437 | BCM2835_GPIO_FSEL_MASK = 0b111 ///< Function select bits mask |
---|
438 | } bcm2835FunctionSelect; |
---|
439 | |
---|
440 | /// \brief bcm2835PUDControl |
---|
441 | /// Pullup/Pulldown defines for bcm2835_gpio_pud() |
---|
442 | typedef enum |
---|
443 | { |
---|
444 | BCM2835_GPIO_PUD_OFF = 0b00, ///< Off ? disable pull-up/down |
---|
445 | BCM2835_GPIO_PUD_DOWN = 0b01, ///< Enable Pull Down control |
---|
446 | BCM2835_GPIO_PUD_UP = 0b10 ///< Enable Pull Up control |
---|
447 | } bcm2835PUDControl; |
---|
448 | |
---|
449 | /// Pad control register offsets from BCM2835_GPIO_PADS |
---|
450 | #define BCM2835_PADS_GPIO_0_27 0x002c ///< Pad control register for pads 0 to 27 |
---|
451 | #define BCM2835_PADS_GPIO_28_45 0x0030 ///< Pad control register for pads 28 to 45 |
---|
452 | #define BCM2835_PADS_GPIO_46_53 0x0034 ///< Pad control register for pads 46 to 53 |
---|
453 | |
---|
454 | /// Pad Control masks |
---|
455 | #define BCM2835_PAD_PASSWRD (0x5A << 24) ///< Password to enable setting pad mask |
---|
456 | #define BCM2835_PAD_SLEW_RATE_UNLIMITED 0x10 ///< Slew rate unlimited |
---|
457 | #define BCM2835_PAD_HYSTERESIS_ENABLED 0x08 ///< Hysteresis enabled |
---|
458 | #define BCM2835_PAD_DRIVE_2mA 0x00 ///< 2mA drive current |
---|
459 | #define BCM2835_PAD_DRIVE_4mA 0x01 ///< 4mA drive current |
---|
460 | #define BCM2835_PAD_DRIVE_6mA 0x02 ///< 6mA drive current |
---|
461 | #define BCM2835_PAD_DRIVE_8mA 0x03 ///< 8mA drive current |
---|
462 | #define BCM2835_PAD_DRIVE_10mA 0x04 ///< 10mA drive current |
---|
463 | #define BCM2835_PAD_DRIVE_12mA 0x05 ///< 12mA drive current |
---|
464 | #define BCM2835_PAD_DRIVE_14mA 0x06 ///< 14mA drive current |
---|
465 | #define BCM2835_PAD_DRIVE_16mA 0x07 ///< 16mA drive current |
---|
466 | |
---|
467 | /// \brief bcm2835PadGroup |
---|
468 | /// Pad group specification for bcm2835_gpio_pad() |
---|
469 | typedef enum |
---|
470 | { |
---|
471 | BCM2835_PAD_GROUP_GPIO_0_27 = 0, ///< Pad group for GPIO pads 0 to 27 |
---|
472 | BCM2835_PAD_GROUP_GPIO_28_45 = 1, ///< Pad group for GPIO pads 28 to 45 |
---|
473 | BCM2835_PAD_GROUP_GPIO_46_53 = 2 ///< Pad group for GPIO pads 46 to 53 |
---|
474 | } bcm2835PadGroup; |
---|
475 | |
---|
476 | /// \brief GPIO Pin Numbers |
---|
477 | /// |
---|
478 | /// Here we define Raspberry Pin GPIO pins on P1 in terms of the underlying BCM GPIO pin numbers. |
---|
479 | /// These can be passed as a pin number to any function requiring a pin. |
---|
480 | /// Not all pins on the RPi 26 bin IDE plug are connected to GPIO pins |
---|
481 | /// and some can adopt an alternate function. |
---|
482 | /// RPi version 2 has some slightly different pinouts, and these are values RPI_V2_*. |
---|
483 | /// At bootup, pins 8 and 10 are set to UART0_TXD, UART0_RXD (ie the alt0 function) respectively |
---|
484 | /// When SPI0 is in use (ie after bcm2835_spi_begin()), pins 19, 21, 23, 24, 26 are dedicated to SPI |
---|
485 | /// and cant be controlled independently |
---|
486 | typedef enum |
---|
487 | { |
---|
488 | RPI_GPIO_P1_03 = 0, ///< Version 1, Pin P1-03 |
---|
489 | RPI_GPIO_P1_05 = 1, ///< Version 1, Pin P1-05 |
---|
490 | RPI_GPIO_P1_07 = 4, ///< Version 1, Pin P1-07 |
---|
491 | RPI_GPIO_P1_08 = 14, ///< Version 1, Pin P1-08, defaults to alt function 0 UART0_TXD |
---|
492 | RPI_GPIO_P1_10 = 15, ///< Version 1, Pin P1-10, defaults to alt function 0 UART0_RXD |
---|
493 | RPI_GPIO_P1_11 = 17, ///< Version 1, Pin P1-11 |
---|
494 | RPI_GPIO_P1_12 = 18, ///< Version 1, Pin P1-12, can be PWM channel 0 in ALT FUN 5 |
---|
495 | RPI_GPIO_P1_13 = 21, ///< Version 1, Pin P1-13 |
---|
496 | RPI_GPIO_P1_15 = 22, ///< Version 1, Pin P1-15 |
---|
497 | RPI_GPIO_P1_16 = 23, ///< Version 1, Pin P1-16 |
---|
498 | RPI_GPIO_P1_18 = 24, ///< Version 1, Pin P1-18 |
---|
499 | RPI_GPIO_P1_19 = 10, ///< Version 1, Pin P1-19, MOSI when SPI0 in use |
---|
500 | RPI_GPIO_P1_21 = 9, ///< Version 1, Pin P1-21, MISO when SPI0 in use |
---|
501 | RPI_GPIO_P1_22 = 25, ///< Version 1, Pin P1-22 |
---|
502 | RPI_GPIO_P1_23 = 11, ///< Version 1, Pin P1-23, CLK when SPI0 in use |
---|
503 | RPI_GPIO_P1_24 = 8, ///< Version 1, Pin P1-24, CE0 when SPI0 in use |
---|
504 | RPI_GPIO_P1_26 = 7, ///< Version 1, Pin P1-26, CE1 when SPI0 in use |
---|
505 | |
---|
506 | // RPi Version 2 |
---|
507 | RPI_V2_GPIO_P1_03 = 2, ///< Version 2, Pin P1-03 |
---|
508 | RPI_V2_GPIO_P1_05 = 3, ///< Version 2, Pin P1-05 |
---|
509 | RPI_V2_GPIO_P1_07 = 4, ///< Version 2, Pin P1-07 |
---|
510 | RPI_V2_GPIO_P1_08 = 14, ///< Version 2, Pin P1-08, defaults to alt function 0 UART0_TXD |
---|
511 | RPI_V2_GPIO_P1_10 = 15, ///< Version 2, Pin P1-10, defaults to alt function 0 UART0_RXD |
---|
512 | RPI_V2_GPIO_P1_11 = 17, ///< Version 2, Pin P1-11 |
---|
513 | RPI_V2_GPIO_P1_12 = 18, ///< Version 2, Pin P1-12, can be PWM channel 0 in ALT FUN 5 |
---|
514 | RPI_V2_GPIO_P1_13 = 27, ///< Version 2, Pin P1-13 |
---|
515 | RPI_V2_GPIO_P1_15 = 22, ///< Version 2, Pin P1-15 |
---|
516 | RPI_V2_GPIO_P1_16 = 23, ///< Version 2, Pin P1-16 |
---|
517 | RPI_V2_GPIO_P1_18 = 24, ///< Version 2, Pin P1-18 |
---|
518 | RPI_V2_GPIO_P1_19 = 10, ///< Version 2, Pin P1-19, MOSI when SPI0 in use |
---|
519 | RPI_V2_GPIO_P1_21 = 9, ///< Version 2, Pin P1-21, MISO when SPI0 in use |
---|
520 | RPI_V2_GPIO_P1_22 = 25, ///< Version 2, Pin P1-22 |
---|
521 | RPI_V2_GPIO_P1_23 = 11, ///< Version 2, Pin P1-23, CLK when SPI0 in use |
---|
522 | RPI_V2_GPIO_P1_24 = 8, ///< Version 2, Pin P1-24, CE0 when SPI0 in use |
---|
523 | RPI_V2_GPIO_P1_26 = 7, ///< Version 2, Pin P1-26, CE1 when SPI0 in use |
---|
524 | |
---|
525 | // RPi Version 2, new plug P5 |
---|
526 | RPI_V2_GPIO_P5_03 = 28, ///< Version 2, Pin P5-03 |
---|
527 | RPI_V2_GPIO_P5_04 = 29, ///< Version 2, Pin P5-04 |
---|
528 | RPI_V2_GPIO_P5_05 = 30, ///< Version 2, Pin P5-05 |
---|
529 | RPI_V2_GPIO_P5_06 = 31, ///< Version 2, Pin P5-06 |
---|
530 | |
---|
531 | } RPiGPIOPin; |
---|
532 | |
---|
533 | // Defines for SPI |
---|
534 | // GPIO register offsets from BCM2835_SPI0_BASE. |
---|
535 | // Offsets into the SPI Peripheral block in bytes per 10.5 SPI Register Map |
---|
536 | #define BCM2835_SPI0_CS 0x0000 ///< SPI Master Control and Status |
---|
537 | #define BCM2835_SPI0_FIFO 0x0004 ///< SPI Master TX and RX FIFOs |
---|
538 | #define BCM2835_SPI0_CLK 0x0008 ///< SPI Master Clock Divider |
---|
539 | #define BCM2835_SPI0_DLEN 0x000c ///< SPI Master Data Length |
---|
540 | #define BCM2835_SPI0_LTOH 0x0010 ///< SPI LOSSI mode TOH |
---|
541 | #define BCM2835_SPI0_DC 0x0014 ///< SPI DMA DREQ Controls |
---|
542 | |
---|
543 | // Register masks for SPI0_CS |
---|
544 | #define BCM2835_SPI0_CS_LEN_LONG 0x02000000 ///< Enable Long data word in Lossi mode if DMA_LEN is set |
---|
545 | #define BCM2835_SPI0_CS_DMA_LEN 0x01000000 ///< Enable DMA mode in Lossi mode |
---|
546 | #define BCM2835_SPI0_CS_CSPOL2 0x00800000 ///< Chip Select 2 Polarity |
---|
547 | #define BCM2835_SPI0_CS_CSPOL1 0x00400000 ///< Chip Select 1 Polarity |
---|
548 | #define BCM2835_SPI0_CS_CSPOL0 0x00200000 ///< Chip Select 0 Polarity |
---|
549 | #define BCM2835_SPI0_CS_RXF 0x00100000 ///< RXF - RX FIFO Full |
---|
550 | #define BCM2835_SPI0_CS_RXR 0x00080000 ///< RXR RX FIFO needs Reading ( full) |
---|
551 | #define BCM2835_SPI0_CS_TXD 0x00040000 ///< TXD TX FIFO can accept Data |
---|
552 | #define BCM2835_SPI0_CS_RXD 0x00020000 ///< RXD RX FIFO contains Data |
---|
553 | #define BCM2835_SPI0_CS_DONE 0x00010000 ///< Done transfer Done |
---|
554 | #define BCM2835_SPI0_CS_TE_EN 0x00008000 ///< Unused |
---|
555 | #define BCM2835_SPI0_CS_LMONO 0x00004000 ///< Unused |
---|
556 | #define BCM2835_SPI0_CS_LEN 0x00002000 ///< LEN LoSSI enable |
---|
557 | #define BCM2835_SPI0_CS_REN 0x00001000 ///< REN Read Enable |
---|
558 | #define BCM2835_SPI0_CS_ADCS 0x00000800 ///< ADCS Automatically Deassert Chip Select |
---|
559 | #define BCM2835_SPI0_CS_INTR 0x00000400 ///< INTR Interrupt on RXR |
---|
560 | #define BCM2835_SPI0_CS_INTD 0x00000200 ///< INTD Interrupt on Done |
---|
561 | #define BCM2835_SPI0_CS_DMAEN 0x00000100 ///< DMAEN DMA Enable |
---|
562 | #define BCM2835_SPI0_CS_TA 0x00000080 ///< Transfer Active |
---|
563 | #define BCM2835_SPI0_CS_CSPOL 0x00000040 ///< Chip Select Polarity |
---|
564 | #define BCM2835_SPI0_CS_CLEAR 0x00000030 ///< Clear FIFO Clear RX and TX |
---|
565 | #define BCM2835_SPI0_CS_CLEAR_RX 0x00000020 ///< Clear FIFO Clear RX |
---|
566 | #define BCM2835_SPI0_CS_CLEAR_TX 0x00000010 ///< Clear FIFO Clear TX |
---|
567 | #define BCM2835_SPI0_CS_CPOL 0x00000008 ///< Clock Polarity |
---|
568 | #define BCM2835_SPI0_CS_CPHA 0x00000004 ///< Clock Phase |
---|
569 | #define BCM2835_SPI0_CS_CS 0x00000003 ///< Chip Select |
---|
570 | |
---|
571 | /// \brief bcm2835SPIBitOrder SPI Bit order |
---|
572 | /// Specifies the SPI data bit ordering for bcm2835_spi_setBitOrder() |
---|
573 | typedef enum |
---|
574 | { |
---|
575 | BCM2835_SPI_BIT_ORDER_LSBFIRST = 0, ///< LSB First |
---|
576 | BCM2835_SPI_BIT_ORDER_MSBFIRST = 1 ///< MSB First |
---|
577 | }bcm2835SPIBitOrder; |
---|
578 | |
---|
579 | /// \brief SPI Data mode |
---|
580 | /// Specify the SPI data mode to be passed to bcm2835_spi_setDataMode() |
---|
581 | typedef enum |
---|
582 | { |
---|
583 | BCM2835_SPI_MODE0 = 0, ///< CPOL = 0, CPHA = 0 |
---|
584 | BCM2835_SPI_MODE1 = 1, ///< CPOL = 0, CPHA = 1 |
---|
585 | BCM2835_SPI_MODE2 = 2, ///< CPOL = 1, CPHA = 0 |
---|
586 | BCM2835_SPI_MODE3 = 3, ///< CPOL = 1, CPHA = 1 |
---|
587 | }bcm2835SPIMode; |
---|
588 | |
---|
589 | /// \brief bcm2835SPIChipSelect |
---|
590 | /// Specify the SPI chip select pin(s) |
---|
591 | typedef enum |
---|
592 | { |
---|
593 | BCM2835_SPI_CS0 = 0, ///< Chip Select 0 |
---|
594 | BCM2835_SPI_CS1 = 1, ///< Chip Select 1 |
---|
595 | BCM2835_SPI_CS2 = 2, ///< Chip Select 2 (ie pins CS1 and CS2 are asserted) |
---|
596 | BCM2835_SPI_CS_NONE = 3, ///< No CS, control it yourself |
---|
597 | } bcm2835SPIChipSelect; |
---|
598 | |
---|
599 | /// \brief bcm2835SPIClockDivider |
---|
600 | /// Specifies the divider used to generate the SPI clock from the system clock. |
---|
601 | /// Figures below give the divider, clock period and clock frequency. |
---|
602 | /// Clock divided is based on nominal base clock rate of 250MHz |
---|
603 | /// It is reported that (contrary to the documentation) any even divider may used. |
---|
604 | /// The frequencies shown for each divider have been confirmed by measurement |
---|
605 | typedef enum |
---|
606 | { |
---|
607 | BCM2835_SPI_CLOCK_DIVIDER_65536 = 0, ///< 65536 = 262.144us = 3.814697260kHz |
---|
608 | BCM2835_SPI_CLOCK_DIVIDER_32768 = 32768, ///< 32768 = 131.072us = 7.629394531kHz |
---|
609 | BCM2835_SPI_CLOCK_DIVIDER_16384 = 16384, ///< 16384 = 65.536us = 15.25878906kHz |
---|
610 | BCM2835_SPI_CLOCK_DIVIDER_8192 = 8192, ///< 8192 = 32.768us = 30/51757813kHz |
---|
611 | BCM2835_SPI_CLOCK_DIVIDER_4096 = 4096, ///< 4096 = 16.384us = 61.03515625kHz |
---|
612 | BCM2835_SPI_CLOCK_DIVIDER_2048 = 2048, ///< 2048 = 8.192us = 122.0703125kHz |
---|
613 | BCM2835_SPI_CLOCK_DIVIDER_1024 = 1024, ///< 1024 = 4.096us = 244.140625kHz |
---|
614 | BCM2835_SPI_CLOCK_DIVIDER_512 = 512, ///< 512 = 2.048us = 488.28125kHz |
---|
615 | BCM2835_SPI_CLOCK_DIVIDER_256 = 256, ///< 256 = 1.024us = 976.5625MHz |
---|
616 | BCM2835_SPI_CLOCK_DIVIDER_128 = 128, ///< 128 = 512ns = = 1.953125MHz |
---|
617 | BCM2835_SPI_CLOCK_DIVIDER_64 = 64, ///< 64 = 256ns = 3.90625MHz |
---|
618 | BCM2835_SPI_CLOCK_DIVIDER_32 = 32, ///< 32 = 128ns = 7.8125MHz |
---|
619 | BCM2835_SPI_CLOCK_DIVIDER_16 = 16, ///< 16 = 64ns = 15.625MHz |
---|
620 | BCM2835_SPI_CLOCK_DIVIDER_8 = 8, ///< 8 = 32ns = 31.25MHz |
---|
621 | BCM2835_SPI_CLOCK_DIVIDER_4 = 4, ///< 4 = 16ns = 62.5MHz |
---|
622 | BCM2835_SPI_CLOCK_DIVIDER_2 = 2, ///< 2 = 8ns = 125MHz, fastest you can get |
---|
623 | BCM2835_SPI_CLOCK_DIVIDER_1 = 1, ///< 1 = 262.144us = 3.814697260kHz, same as 0/65536 |
---|
624 | } bcm2835SPIClockDivider; |
---|
625 | |
---|
626 | // Defines for I2C |
---|
627 | // GPIO register offsets from BCM2835_BSC*_BASE. |
---|
628 | // Offsets into the BSC Peripheral block in bytes per 3.1 BSC Register Map |
---|
629 | #define BCM2835_BSC_C 0x0000 ///< BSC Master Control |
---|
630 | #define BCM2835_BSC_S 0x0004 ///< BSC Master Status |
---|
631 | #define BCM2835_BSC_DLEN 0x0008 ///< BSC Master Data Length |
---|
632 | #define BCM2835_BSC_A 0x000c ///< BSC Master Slave Address |
---|
633 | #define BCM2835_BSC_FIFO 0x0010 ///< BSC Master Data FIFO |
---|
634 | #define BCM2835_BSC_DIV 0x0014 ///< BSC Master Clock Divider |
---|
635 | #define BCM2835_BSC_DEL 0x0018 ///< BSC Master Data Delay |
---|
636 | #define BCM2835_BSC_CLKT 0x001c ///< BSC Master Clock Stretch Timeout |
---|
637 | |
---|
638 | // Register masks for BSC_C |
---|
639 | #define BCM2835_BSC_C_I2CEN 0x00008000 ///< I2C Enable, 0 = disabled, 1 = enabled |
---|
640 | #define BCM2835_BSC_C_INTR 0x00000400 ///< Interrupt on RX |
---|
641 | #define BCM2835_BSC_C_INTT 0x00000200 ///< Interrupt on TX |
---|
642 | #define BCM2835_BSC_C_INTD 0x00000100 ///< Interrupt on DONE |
---|
643 | #define BCM2835_BSC_C_ST 0x00000080 ///< Start transfer, 1 = Start a new transfer |
---|
644 | #define BCM2835_BSC_C_CLEAR_1 0x00000020 ///< Clear FIFO Clear |
---|
645 | #define BCM2835_BSC_C_CLEAR_2 0x00000010 ///< Clear FIFO Clear |
---|
646 | #define BCM2835_BSC_C_READ 0x00000001 ///< Read transfer |
---|
647 | |
---|
648 | // Register masks for BSC_S |
---|
649 | #define BCM2835_BSC_S_CLKT 0x00000200 ///< Clock stretch timeout |
---|
650 | #define BCM2835_BSC_S_ERR 0x00000100 ///< ACK error |
---|
651 | #define BCM2835_BSC_S_RXF 0x00000080 ///< RXF FIFO full, 0 = FIFO is not full, 1 = FIFO is full |
---|
652 | #define BCM2835_BSC_S_TXE 0x00000040 ///< TXE FIFO full, 0 = FIFO is not full, 1 = FIFO is full |
---|
653 | #define BCM2835_BSC_S_RXD 0x00000020 ///< RXD FIFO contains data |
---|
654 | #define BCM2835_BSC_S_TXD 0x00000010 ///< TXD FIFO can accept data |
---|
655 | #define BCM2835_BSC_S_RXR 0x00000008 ///< RXR FIFO needs reading (full) |
---|
656 | #define BCM2835_BSC_S_TXW 0x00000004 ///< TXW FIFO needs writing (full) |
---|
657 | #define BCM2835_BSC_S_DONE 0x00000002 ///< Transfer DONE |
---|
658 | #define BCM2835_BSC_S_TA 0x00000001 ///< Transfer Active |
---|
659 | |
---|
660 | #define BCM2835_BSC_FIFO_SIZE 16 ///< BSC FIFO size |
---|
661 | |
---|
662 | /// \brief bcm2835I2CClockDivider |
---|
663 | /// Specifies the divider used to generate the I2C clock from the system clock. |
---|
664 | /// Clock divided is based on nominal base clock rate of 250MHz |
---|
665 | typedef enum |
---|
666 | { |
---|
667 | BCM2835_I2C_CLOCK_DIVIDER_2500 = 2500, ///< 2500 = 10us = 100 kHz |
---|
668 | BCM2835_I2C_CLOCK_DIVIDER_626 = 626, ///< 622 = 2.504us = 399.3610 kHz |
---|
669 | BCM2835_I2C_CLOCK_DIVIDER_150 = 150, ///< 150 = 60ns = 1.666 MHz (default at reset) |
---|
670 | BCM2835_I2C_CLOCK_DIVIDER_148 = 148, ///< 148 = 59ns = 1.689 MHz |
---|
671 | } bcm2835I2CClockDivider; |
---|
672 | |
---|
673 | /// \brief bcm2835I2CReasonCodes |
---|
674 | /// Specifies the reason codes for the bcm2835_i2c_write and bcm2835_i2c_read functions. |
---|
675 | typedef enum |
---|
676 | { |
---|
677 | BCM2835_I2C_REASON_OK = 0x00, ///< Success |
---|
678 | BCM2835_I2C_REASON_ERROR_NACK = 0x01, ///< Received a NACK |
---|
679 | BCM2835_I2C_REASON_ERROR_CLKT = 0x02, ///< Received Clock Stretch Timeout |
---|
680 | BCM2835_I2C_REASON_ERROR_DATA = 0x04, ///< Not all data is sent / received |
---|
681 | } bcm2835I2CReasonCodes; |
---|
682 | |
---|
683 | // Defines for ST |
---|
684 | // GPIO register offsets from BCM2835_ST_BASE. |
---|
685 | // Offsets into the ST Peripheral block in bytes per 12.1 System Timer Registers |
---|
686 | // The System Timer peripheral provides four 32-bit timer channels and a single 64-bit free running counter. |
---|
687 | // BCM2835_ST_CLO is the System Timer Counter Lower bits register. |
---|
688 | // The system timer free-running counter lower register is a read-only register that returns the current value |
---|
689 | // of the lower 32-bits of the free running counter. |
---|
690 | // BCM2835_ST_CHI is the System Timer Counter Upper bits register. |
---|
691 | // The system timer free-running counter upper register is a read-only register that returns the current value |
---|
692 | // of the upper 32-bits of the free running counter. |
---|
693 | #define BCM2835_ST_CS 0x0000 ///< System Timer Control/Status |
---|
694 | #define BCM2835_ST_CLO 0x0004 ///< System Timer Counter Lower 32 bits |
---|
695 | #define BCM2835_ST_CHI 0x0008 ///< System Timer Counter Upper 32 bits |
---|
696 | |
---|
697 | /// @} |
---|
698 | |
---|
699 | |
---|
700 | // Defines for PWM, word offsets (ie 4 byte multiples) |
---|
701 | #define BCM2835_PWM_CONTROL 0 |
---|
702 | #define BCM2835_PWM_STATUS 1 |
---|
703 | #define BCM2835_PWM_DMAC 2 |
---|
704 | #define BCM2835_PWM0_RANGE 4 |
---|
705 | #define BCM2835_PWM0_DATA 5 |
---|
706 | #define BCM2835_PWM_FIF1 6 |
---|
707 | #define BCM2835_PWM1_RANGE 8 |
---|
708 | #define BCM2835_PWM1_DATA 9 |
---|
709 | |
---|
710 | // Defines for PWM Clock, word offsets (ie 4 byte multiples) |
---|
711 | #define BCM2835_PWMCLK_CNTL 40 |
---|
712 | #define BCM2835_PWMCLK_DIV 41 |
---|
713 | #define BCM2835_PWM_PASSWRD (0x5A << 24) ///< Password to enable setting PWM clock |
---|
714 | |
---|
715 | #define BCM2835_PWM1_MS_MODE 0x8000 ///< Run in Mark/Space mode |
---|
716 | #define BCM2835_PWM1_USEFIFO 0x2000 ///< Data from FIFO |
---|
717 | #define BCM2835_PWM1_REVPOLAR 0x1000 ///< Reverse polarity |
---|
718 | #define BCM2835_PWM1_OFFSTATE 0x0800 ///< Ouput Off state |
---|
719 | #define BCM2835_PWM1_REPEATFF 0x0400 ///< Repeat last value if FIFO empty |
---|
720 | #define BCM2835_PWM1_SERIAL 0x0200 ///< Run in serial mode |
---|
721 | #define BCM2835_PWM1_ENABLE 0x0100 ///< Channel Enable |
---|
722 | |
---|
723 | #define BCM2835_PWM0_MS_MODE 0x0080 ///< Run in Mark/Space mode |
---|
724 | #define BCM2835_PWM_CLEAR_FIFO 0x0040 ///< Clear FIFO |
---|
725 | #define BCM2835_PWM0_USEFIFO 0x0020 ///< Data from FIFO |
---|
726 | #define BCM2835_PWM0_REVPOLAR 0x0010 ///< Reverse polarity |
---|
727 | #define BCM2835_PWM0_OFFSTATE 0x0008 ///< Ouput Off state |
---|
728 | #define BCM2835_PWM0_REPEATFF 0x0004 ///< Repeat last value if FIFO empty |
---|
729 | #define BCM2835_PWM0_SERIAL 0x0002 ///< Run in serial mode |
---|
730 | #define BCM2835_PWM0_ENABLE 0x0001 ///< Channel Enable |
---|
731 | |
---|
732 | /// \brief bcm2835PWMClockDivider |
---|
733 | /// Specifies the divider used to generate the PWM clock from the system clock. |
---|
734 | /// Figures below give the divider, clock period and clock frequency. |
---|
735 | /// Clock divided is based on nominal PWM base clock rate of 19.2MHz |
---|
736 | /// The frequencies shown for each divider have been confirmed by measurement |
---|
737 | typedef enum |
---|
738 | { |
---|
739 | BCM2835_PWM_CLOCK_DIVIDER_32768 = 32768, ///< 32768 = 585Hz |
---|
740 | BCM2835_PWM_CLOCK_DIVIDER_16384 = 16384, ///< 16384 = 1171.8Hz |
---|
741 | BCM2835_PWM_CLOCK_DIVIDER_8192 = 8192, ///< 8192 = 2.34375kHz |
---|
742 | BCM2835_PWM_CLOCK_DIVIDER_4096 = 4096, ///< 4096 = 4.6875kHz |
---|
743 | BCM2835_PWM_CLOCK_DIVIDER_2048 = 2048, ///< 2048 = 9.375kHz |
---|
744 | BCM2835_PWM_CLOCK_DIVIDER_1024 = 1024, ///< 1024 = 18.75kHz |
---|
745 | BCM2835_PWM_CLOCK_DIVIDER_512 = 512, ///< 512 = 37.5kHz |
---|
746 | BCM2835_PWM_CLOCK_DIVIDER_256 = 256, ///< 256 = 75kHz |
---|
747 | BCM2835_PWM_CLOCK_DIVIDER_128 = 128, ///< 128 = 150kHz |
---|
748 | BCM2835_PWM_CLOCK_DIVIDER_64 = 64, ///< 64 = 300kHz |
---|
749 | BCM2835_PWM_CLOCK_DIVIDER_32 = 32, ///< 32 = 600.0kHz |
---|
750 | BCM2835_PWM_CLOCK_DIVIDER_16 = 16, ///< 16 = 1.2MHz |
---|
751 | BCM2835_PWM_CLOCK_DIVIDER_8 = 8, ///< 8 = 2.4MHz |
---|
752 | BCM2835_PWM_CLOCK_DIVIDER_4 = 4, ///< 4 = 4.8MHz |
---|
753 | BCM2835_PWM_CLOCK_DIVIDER_2 = 2, ///< 2 = 9.6MHz, fastest you can get |
---|
754 | BCM2835_PWM_CLOCK_DIVIDER_1 = 1, ///< 1 = 4.6875kHz, same as divider 4096 |
---|
755 | } bcm2835PWMClockDivider; |
---|
756 | |
---|
757 | // Historical name compatibility |
---|
758 | #ifndef BCM2835_NO_DELAY_COMPATIBILITY |
---|
759 | #define delay(x) bcm2835_delay(x) |
---|
760 | #define delayMicroseconds(x) bcm2835_delayMicroseconds(x) |
---|
761 | #endif |
---|
762 | |
---|
763 | #ifdef __cplusplus |
---|
764 | extern "C" { |
---|
765 | #endif |
---|
766 | |
---|
767 | /// \defgroup init Library initialisation and management |
---|
768 | /// These functions allow you to intialise and control the bcm2835 library |
---|
769 | /// @{ |
---|
770 | |
---|
771 | /// Initialise the library by opening /dev/mem and getting pointers to the |
---|
772 | /// internal memory for BCM 2835 device registers. You must call this (successfully) |
---|
773 | /// before calling any other |
---|
774 | /// functions in this library (except bcm2835_set_debug). |
---|
775 | /// If bcm2835_init() fails by returning 0, |
---|
776 | /// calling any other function may result in crashes or other failures. |
---|
777 | /// Prints messages to stderr in case of errors. |
---|
778 | /// \return 1 if successful else 0 |
---|
779 | extern int bcm2835_init(void); |
---|
780 | |
---|
781 | /// Close the library, deallocating any allocated memory and closing /dev/mem |
---|
782 | /// \return 1 if successful else 0 |
---|
783 | extern int bcm2835_close(void); |
---|
784 | |
---|
785 | /// Sets the debug level of the library. |
---|
786 | /// A value of 1 prevents mapping to /dev/mem, and makes the library print out |
---|
787 | /// what it would do, rather than accessing the GPIO registers. |
---|
788 | /// A value of 0, the default, causes normal operation. |
---|
789 | /// Call this before calling bcm2835_init(); |
---|
790 | /// \param[in] debug The new debug level. 1 means debug |
---|
791 | extern void bcm2835_set_debug(uint8_t debug); |
---|
792 | |
---|
793 | /// @} // end of init |
---|
794 | |
---|
795 | /// \defgroup lowlevel Low level register access |
---|
796 | /// These functions provide low level register access, and should not generally |
---|
797 | /// need to be used |
---|
798 | /// |
---|
799 | /// @{ |
---|
800 | |
---|
801 | /// Reads 32 bit value from a peripheral address |
---|
802 | /// The read is done twice, and is therefore always safe in terms of |
---|
803 | /// manual section 1.3 Peripheral access precautions for correct memory ordering |
---|
804 | /// \param[in] paddr Physical address to read from. See BCM2835_GPIO_BASE etc. |
---|
805 | /// \return the value read from the 32 bit register |
---|
806 | /// \sa Physical Addresses |
---|
807 | extern uint32_t bcm2835_peri_read(volatile uint32_t* paddr); |
---|
808 | |
---|
809 | |
---|
810 | /// Reads 32 bit value from a peripheral address without the read barrier |
---|
811 | /// You should only use this when your code has previously called bcm2835_peri_read() |
---|
812 | /// within the same peripheral, and no other peripheral access has occurred since. |
---|
813 | /// \param[in] paddr Physical address to read from. See BCM2835_GPIO_BASE etc. |
---|
814 | /// \return the value read from the 32 bit register |
---|
815 | /// \sa Physical Addresses |
---|
816 | extern uint32_t bcm2835_peri_read_nb(volatile uint32_t* paddr); |
---|
817 | |
---|
818 | |
---|
819 | /// Writes 32 bit value from a peripheral address |
---|
820 | /// The write is done twice, and is therefore always safe in terms of |
---|
821 | /// manual section 1.3 Peripheral access precautions for correct memory ordering |
---|
822 | /// \param[in] paddr Physical address to read from. See BCM2835_GPIO_BASE etc. |
---|
823 | /// \param[in] value The 32 bit value to write |
---|
824 | /// \sa Physical Addresses |
---|
825 | extern void bcm2835_peri_write(volatile uint32_t* paddr, uint32_t value); |
---|
826 | |
---|
827 | /// Writes 32 bit value from a peripheral address without the write barrier |
---|
828 | /// You should only use this when your code has previously called bcm2835_peri_write() |
---|
829 | /// within the same peripheral, and no other peripheral access has occurred since. |
---|
830 | /// \param[in] paddr Physical address to read from. See BCM2835_GPIO_BASE etc. |
---|
831 | /// \param[in] value The 32 bit value to write |
---|
832 | /// \sa Physical Addresses |
---|
833 | extern void bcm2835_peri_write_nb(volatile uint32_t* paddr, uint32_t value); |
---|
834 | |
---|
835 | /// Alters a number of bits in a 32 peripheral regsiter. |
---|
836 | /// It reads the current valu and then alters the bits deines as 1 in mask, |
---|
837 | /// according to the bit value in value. |
---|
838 | /// All other bits that are 0 in the mask are unaffected. |
---|
839 | /// Use this to alter a subset of the bits in a register. |
---|
840 | /// The write is done twice, and is therefore always safe in terms of |
---|
841 | /// manual section 1.3 Peripheral access precautions for correct memory ordering |
---|
842 | /// \param[in] paddr Physical address to read from. See BCM2835_GPIO_BASE etc. |
---|
843 | /// \param[in] value The 32 bit value to write, masked in by mask. |
---|
844 | /// \param[in] mask Bitmask that defines the bits that will be altered in the register. |
---|
845 | /// \sa Physical Addresses |
---|
846 | extern void bcm2835_peri_set_bits(volatile uint32_t* paddr, uint32_t value, uint32_t mask); |
---|
847 | /// @} // end of lowlevel |
---|
848 | |
---|
849 | /// \defgroup gpio GPIO register access |
---|
850 | /// These functions allow you to control the GPIO interface. You can set the |
---|
851 | /// function of each GPIO pin, read the input state and set the output state. |
---|
852 | /// @{ |
---|
853 | |
---|
854 | /// Sets the Function Select register for the given pin, which configures |
---|
855 | /// the pin as Input, Output or one of the 6 alternate functions. |
---|
856 | /// \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin. |
---|
857 | /// \param[in] mode Mode to set the pin to, one of BCM2835_GPIO_FSEL_* from \ref bcm2835FunctionSelect |
---|
858 | extern void bcm2835_gpio_fsel(uint8_t pin, uint8_t mode); |
---|
859 | |
---|
860 | /// Sets the specified pin output to |
---|
861 | /// HIGH. |
---|
862 | /// \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin. |
---|
863 | /// \sa bcm2835_gpio_write() |
---|
864 | extern void bcm2835_gpio_set(uint8_t pin); |
---|
865 | |
---|
866 | /// Sets the specified pin output to |
---|
867 | /// LOW. |
---|
868 | /// \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin. |
---|
869 | /// \sa bcm2835_gpio_write() |
---|
870 | extern void bcm2835_gpio_clr(uint8_t pin); |
---|
871 | |
---|
872 | /// Sets any of the first 32 GPIO output pins specified in the mask to |
---|
873 | /// HIGH. |
---|
874 | /// \param[in] mask Mask of pins to affect. Use eg: (1 << RPI_GPIO_P1_03) | (1 << RPI_GPIO_P1_05) |
---|
875 | /// \sa bcm2835_gpio_write_multi() |
---|
876 | extern void bcm2835_gpio_set_multi(uint32_t mask); |
---|
877 | |
---|
878 | /// Sets any of the first 32 GPIO output pins specified in the mask to |
---|
879 | /// LOW. |
---|
880 | /// \param[in] mask Mask of pins to affect. Use eg: (1 << RPI_GPIO_P1_03) | (1 << RPI_GPIO_P1_05) |
---|
881 | /// \sa bcm2835_gpio_write_multi() |
---|
882 | extern void bcm2835_gpio_clr_multi(uint32_t mask); |
---|
883 | |
---|
884 | /// Reads the current level on the specified |
---|
885 | /// pin and returns either HIGH or LOW. Works whether or not the pin |
---|
886 | /// is an input or an output. |
---|
887 | /// \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin. |
---|
888 | /// \return the current level either HIGH or LOW |
---|
889 | extern uint8_t bcm2835_gpio_lev(uint8_t pin); |
---|
890 | |
---|
891 | /// Event Detect Status. |
---|
892 | /// Tests whether the specified pin has detected a level or edge |
---|
893 | /// as requested by bcm2835_gpio_ren(), bcm2835_gpio_fen(), bcm2835_gpio_hen(), |
---|
894 | /// bcm2835_gpio_len(), bcm2835_gpio_aren(), bcm2835_gpio_afen(). |
---|
895 | /// Clear the flag for a given pin by calling bcm2835_gpio_set_eds(pin); |
---|
896 | /// \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin. |
---|
897 | /// \return HIGH if the event detect status for the given pin is true. |
---|
898 | extern uint8_t bcm2835_gpio_eds(uint8_t pin); |
---|
899 | |
---|
900 | /// Sets the Event Detect Status register for a given pin to 1, |
---|
901 | /// which has the effect of clearing the flag. Use this afer seeing |
---|
902 | /// an Event Detect Status on the pin. |
---|
903 | /// \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin. |
---|
904 | extern void bcm2835_gpio_set_eds(uint8_t pin); |
---|
905 | |
---|
906 | /// Enable Rising Edge Detect Enable for the specified pin. |
---|
907 | /// When a rising edge is detected, sets the appropriate pin in Event Detect Status. |
---|
908 | /// The GPRENn registers use |
---|
909 | /// synchronous edge detection. This means the input signal is sampled using the |
---|
910 | /// system clock and then it is looking for a ?011? pattern on the sampled signal. This |
---|
911 | /// has the effect of suppressing glitches. |
---|
912 | /// \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin. |
---|
913 | extern void bcm2835_gpio_ren(uint8_t pin); |
---|
914 | |
---|
915 | /// Disable Rising Edge Detect Enable for the specified pin. |
---|
916 | /// \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin. |
---|
917 | extern void bcm2835_gpio_clr_ren(uint8_t pin); |
---|
918 | |
---|
919 | /// Enable Falling Edge Detect Enable for the specified pin. |
---|
920 | /// When a falling edge is detected, sets the appropriate pin in Event Detect Status. |
---|
921 | /// The GPRENn registers use |
---|
922 | /// synchronous edge detection. This means the input signal is sampled using the |
---|
923 | /// system clock and then it is looking for a ?100? pattern on the sampled signal. This |
---|
924 | /// has the effect of suppressing glitches. |
---|
925 | /// \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin. |
---|
926 | extern void bcm2835_gpio_fen(uint8_t pin); |
---|
927 | |
---|
928 | /// Disable Falling Edge Detect Enable for the specified pin. |
---|
929 | /// \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin. |
---|
930 | extern void bcm2835_gpio_clr_fen(uint8_t pin); |
---|
931 | |
---|
932 | /// Enable High Detect Enable for the specified pin. |
---|
933 | /// When a HIGH level is detected on the pin, sets the appropriate pin in Event Detect Status. |
---|
934 | /// \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin. |
---|
935 | extern void bcm2835_gpio_hen(uint8_t pin); |
---|
936 | |
---|
937 | /// Disable High Detect Enable for the specified pin. |
---|
938 | /// \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin. |
---|
939 | extern void bcm2835_gpio_clr_hen(uint8_t pin); |
---|
940 | |
---|
941 | /// Enable Low Detect Enable for the specified pin. |
---|
942 | /// When a LOW level is detected on the pin, sets the appropriate pin in Event Detect Status. |
---|
943 | /// \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin. |
---|
944 | extern void bcm2835_gpio_len(uint8_t pin); |
---|
945 | |
---|
946 | /// Disable Low Detect Enable for the specified pin. |
---|
947 | /// \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin. |
---|
948 | extern void bcm2835_gpio_clr_len(uint8_t pin); |
---|
949 | |
---|
950 | /// Enable Asynchronous Rising Edge Detect Enable for the specified pin. |
---|
951 | /// When a rising edge is detected, sets the appropriate pin in Event Detect Status. |
---|
952 | /// Asynchronous means the incoming signal is not sampled by the system clock. As such |
---|
953 | /// rising edges of very short duration can be detected. |
---|
954 | /// \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin. |
---|
955 | extern void bcm2835_gpio_aren(uint8_t pin); |
---|
956 | |
---|
957 | /// Disable Asynchronous Rising Edge Detect Enable for the specified pin. |
---|
958 | /// \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin. |
---|
959 | extern void bcm2835_gpio_clr_aren(uint8_t pin); |
---|
960 | |
---|
961 | /// Enable Asynchronous Falling Edge Detect Enable for the specified pin. |
---|
962 | /// When a falling edge is detected, sets the appropriate pin in Event Detect Status. |
---|
963 | /// Asynchronous means the incoming signal is not sampled by the system clock. As such |
---|
964 | /// falling edges of very short duration can be detected. |
---|
965 | /// \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin. |
---|
966 | extern void bcm2835_gpio_afen(uint8_t pin); |
---|
967 | |
---|
968 | /// Disable Asynchronous Falling Edge Detect Enable for the specified pin. |
---|
969 | /// \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin. |
---|
970 | extern void bcm2835_gpio_clr_afen(uint8_t pin); |
---|
971 | |
---|
972 | /// Sets the Pull-up/down register for the given pin. This is |
---|
973 | /// used with bcm2835_gpio_pudclk() to set the Pull-up/down resistor for the given pin. |
---|
974 | /// However, it is usually more convenient to use bcm2835_gpio_set_pud(). |
---|
975 | /// \param[in] pud The desired Pull-up/down mode. One of BCM2835_GPIO_PUD_* from bcm2835PUDControl |
---|
976 | /// \sa bcm2835_gpio_set_pud() |
---|
977 | extern void bcm2835_gpio_pud(uint8_t pud); |
---|
978 | |
---|
979 | /// Clocks the Pull-up/down value set earlier by bcm2835_gpio_pud() into the pin. |
---|
980 | /// \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin. |
---|
981 | /// \param[in] on HIGH to clock the value from bcm2835_gpio_pud() into the pin. |
---|
982 | /// LOW to remove the clock. |
---|
983 | /// \sa bcm2835_gpio_set_pud() |
---|
984 | extern void bcm2835_gpio_pudclk(uint8_t pin, uint8_t on); |
---|
985 | |
---|
986 | /// Reads and returns the Pad Control for the given GPIO group. |
---|
987 | /// \param[in] group The GPIO pad group number, one of BCM2835_PAD_GROUP_GPIO_* |
---|
988 | /// \return Mask of bits from BCM2835_PAD_* from \ref bcm2835PadGroup |
---|
989 | extern uint32_t bcm2835_gpio_pad(uint8_t group); |
---|
990 | |
---|
991 | /// Sets the Pad Control for the given GPIO group. |
---|
992 | /// \param[in] group The GPIO pad group number, one of BCM2835_PAD_GROUP_GPIO_* |
---|
993 | /// \param[in] control Mask of bits from BCM2835_PAD_* from \ref bcm2835PadGroup. Note |
---|
994 | /// that it is not necessary to include BCM2835_PAD_PASSWRD in the mask as this |
---|
995 | /// is automatically included. |
---|
996 | extern void bcm2835_gpio_set_pad(uint8_t group, uint32_t control); |
---|
997 | |
---|
998 | /// Delays for the specified number of milliseconds. |
---|
999 | /// Uses nanosleep(), and therefore does not use CPU until the time is up. |
---|
1000 | /// However, you are at the mercy of nanosleep(). From the manual for nanosleep(): |
---|
1001 | /// If the interval specified in req is not an exact multiple of the granularity |
---|
1002 | /// underlying clock (see time(7)), then the interval will be |
---|
1003 | /// rounded up to the next multiple. Furthermore, after the sleep completes, |
---|
1004 | /// there may still be a delay before the CPU becomes free to once |
---|
1005 | /// again execute the calling thread. |
---|
1006 | /// \param[in] millis Delay in milliseconds |
---|
1007 | extern void bcm2835_delay (unsigned int millis); |
---|
1008 | |
---|
1009 | /// Delays for the specified number of microseconds. |
---|
1010 | /// Uses a combination of nanosleep() and a busy wait loop on the BCM2835 system timers, |
---|
1011 | /// However, you are at the mercy of nanosleep(). From the manual for nanosleep(): |
---|
1012 | /// If the interval specified in req is not an exact multiple of the granularity |
---|
1013 | /// underlying clock (see time(7)), then the interval will be |
---|
1014 | /// rounded up to the next multiple. Furthermore, after the sleep completes, |
---|
1015 | /// there may still be a delay before the CPU becomes free to once |
---|
1016 | /// again execute the calling thread. |
---|
1017 | /// For times less than about 450 microseconds, uses a busy wait on the System Timer. |
---|
1018 | /// It is reported that a delay of 0 microseconds on RaspberryPi will in fact |
---|
1019 | /// result in a delay of about 80 microseconds. Your mileage may vary. |
---|
1020 | /// \param[in] micros Delay in microseconds |
---|
1021 | extern void bcm2835_delayMicroseconds (uint64_t micros); |
---|
1022 | |
---|
1023 | /// Sets the output state of the specified pin |
---|
1024 | /// \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin. |
---|
1025 | /// \param[in] on HIGH sets the output to HIGH and LOW to LOW. |
---|
1026 | extern void bcm2835_gpio_write(uint8_t pin, uint8_t on); |
---|
1027 | |
---|
1028 | /// Sets any of the first 32 GPIO output pins specified in the mask to the state given by on |
---|
1029 | /// \param[in] mask Mask of pins to affect. Use eg: (1 << RPI_GPIO_P1_03) | (1 << RPI_GPIO_P1_05) |
---|
1030 | /// \param[in] on HIGH sets the output to HIGH and LOW to LOW. |
---|
1031 | extern void bcm2835_gpio_write_multi(uint32_t mask, uint8_t on); |
---|
1032 | |
---|
1033 | /// Sets the first 32 GPIO output pins specified in the mask to the value given by value |
---|
1034 | /// \param[in] value values required for each bit masked in by mask, eg: (1 << RPI_GPIO_P1_03) | (1 << RPI_GPIO_P1_05) |
---|
1035 | /// \param[in] mask Mask of pins to affect. Use eg: (1 << RPI_GPIO_P1_03) | (1 << RPI_GPIO_P1_05) |
---|
1036 | extern void bcm2835_gpio_write_mask(uint32_t value, uint32_t mask); |
---|
1037 | |
---|
1038 | /// Sets the Pull-up/down mode for the specified pin. This is more convenient than |
---|
1039 | /// clocking the mode in with bcm2835_gpio_pud() and bcm2835_gpio_pudclk(). |
---|
1040 | /// \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin. |
---|
1041 | /// \param[in] pud The desired Pull-up/down mode. One of BCM2835_GPIO_PUD_* from bcm2835PUDControl |
---|
1042 | extern void bcm2835_gpio_set_pud(uint8_t pin, uint8_t pud); |
---|
1043 | |
---|
1044 | /// @} |
---|
1045 | |
---|
1046 | /// \defgroup spi SPI access |
---|
1047 | /// These functions let you use SPI0 (Serial Peripheral Interface) to |
---|
1048 | /// interface with an external SPI device. |
---|
1049 | /// @{ |
---|
1050 | |
---|
1051 | /// Start SPI operations. |
---|
1052 | /// Forces RPi SPI0 pins P1-19 (MOSI), P1-21 (MISO), P1-23 (CLK), P1-24 (CE0) and P1-26 (CE1) |
---|
1053 | /// to alternate function ALT0, which enables those pins for SPI interface. |
---|
1054 | /// You should call bcm2835_spi_end() when all SPI funcitons are complete to return the pins to |
---|
1055 | /// their default functions |
---|
1056 | /// \sa bcm2835_spi_end() |
---|
1057 | extern void bcm2835_spi_begin(void); |
---|
1058 | |
---|
1059 | /// End SPI operations. |
---|
1060 | /// SPI0 pins P1-19 (MOSI), P1-21 (MISO), P1-23 (CLK), P1-24 (CE0) and P1-26 (CE1) |
---|
1061 | /// are returned to their default INPUT behaviour. |
---|
1062 | extern void bcm2835_spi_end(void); |
---|
1063 | |
---|
1064 | /// Sets the SPI bit order |
---|
1065 | /// NOTE: has no effect. Not supported by SPI0. |
---|
1066 | /// Defaults to |
---|
1067 | /// \param[in] order The desired bit order, one of BCM2835_SPI_BIT_ORDER_*, |
---|
1068 | /// see \ref bcm2835SPIBitOrder |
---|
1069 | extern void bcm2835_spi_setBitOrder(uint8_t order); |
---|
1070 | |
---|
1071 | /// Sets the SPI clock divider and therefore the |
---|
1072 | /// SPI clock speed. |
---|
1073 | /// \param[in] divider The desired SPI clock divider, one of BCM2835_SPI_CLOCK_DIVIDER_*, |
---|
1074 | /// see \ref bcm2835SPIClockDivider |
---|
1075 | extern void bcm2835_spi_setClockDivider(uint16_t divider); |
---|
1076 | |
---|
1077 | /// Sets the SPI data mode |
---|
1078 | /// Sets the clock polariy and phase |
---|
1079 | /// \param[in] mode The desired data mode, one of BCM2835_SPI_MODE*, |
---|
1080 | /// see \ref bcm2835SPIMode |
---|
1081 | extern void bcm2835_spi_setDataMode(uint8_t mode); |
---|
1082 | |
---|
1083 | /// Sets the chip select pin(s) |
---|
1084 | /// When an bcm2835_spi_transfer() is made, the selected pin(s) will be asserted during the |
---|
1085 | /// transfer. |
---|
1086 | /// \param[in] cs Specifies the CS pins(s) that are used to activate the desired slave. |
---|
1087 | /// One of BCM2835_SPI_CS*, see \ref bcm2835SPIChipSelect |
---|
1088 | extern void bcm2835_spi_chipSelect(uint8_t cs); |
---|
1089 | |
---|
1090 | /// Sets the chip select pin polarity for a given pin |
---|
1091 | /// When an bcm2835_spi_transfer() occurs, the currently selected chip select pin(s) |
---|
1092 | /// will be asserted to the |
---|
1093 | /// value given by active. When transfers are not happening, the chip select pin(s) |
---|
1094 | /// return to the complement (inactive) value. |
---|
1095 | /// \param[in] cs The chip select pin to affect |
---|
1096 | /// \param[in] active Whether the chip select pin is to be active HIGH |
---|
1097 | extern void bcm2835_spi_setChipSelectPolarity(uint8_t cs, uint8_t active); |
---|
1098 | |
---|
1099 | /// Transfers one byte to and from the currently selected SPI slave. |
---|
1100 | /// Asserts the currently selected CS pins (as previously set by bcm2835_spi_chipSelect) |
---|
1101 | /// during the transfer. |
---|
1102 | /// Clocks the 8 bit value out on MOSI, and simultaneously clocks in data from MISO. |
---|
1103 | /// Returns the read data byte from the slave. |
---|
1104 | /// Uses polled transfer as per section 10.6.1 of the BCM 2835 ARM Peripherls manual |
---|
1105 | /// \param[in] value The 8 bit data byte to write to MOSI |
---|
1106 | /// \return The 8 bit byte simultaneously read from MISO |
---|
1107 | /// \sa bcm2835_spi_transfern() |
---|
1108 | extern uint8_t bcm2835_spi_transfer(uint8_t value); |
---|
1109 | |
---|
1110 | /// Transfers any number of bytes to and from the currently selected SPI slave. |
---|
1111 | /// Asserts the currently selected CS pins (as previously set by bcm2835_spi_chipSelect) |
---|
1112 | /// during the transfer. |
---|
1113 | /// Clocks the len 8 bit bytes out on MOSI, and simultaneously clocks in data from MISO. |
---|
1114 | /// The data read read from the slave is placed into rbuf. rbuf must be at least len bytes long |
---|
1115 | /// Uses polled transfer as per section 10.6.1 of the BCM 2835 ARM Peripherls manual |
---|
1116 | /// \param[in] tbuf Buffer of bytes to send. |
---|
1117 | /// \param[out] rbuf Received bytes will by put in this buffer |
---|
1118 | /// \param[in] len Number of bytes in the tbuf buffer, and the number of bytes to send/received |
---|
1119 | /// \sa bcm2835_spi_transfer() |
---|
1120 | extern void bcm2835_spi_transfernb(char* tbuf, char* rbuf, uint32_t len); |
---|
1121 | |
---|
1122 | /// Transfers any number of bytes to and from the currently selected SPI slave |
---|
1123 | /// using bcm2835_spi_transfernb. |
---|
1124 | /// The returned data from the slave replaces the transmitted data in the buffer. |
---|
1125 | /// \param[in,out] buf Buffer of bytes to send. Received bytes will replace the contents |
---|
1126 | /// \param[in] len Number of bytes int eh buffer, and the number of bytes to send/received |
---|
1127 | /// \sa bcm2835_spi_transfer() |
---|
1128 | extern void bcm2835_spi_transfern(char* buf, uint32_t len); |
---|
1129 | |
---|
1130 | /// Transfers any number of bytes to the currently selected SPI slave. |
---|
1131 | /// Asserts the currently selected CS pins (as previously set by bcm2835_spi_chipSelect) |
---|
1132 | /// during the transfer. |
---|
1133 | /// \param[in] buf Buffer of bytes to send. |
---|
1134 | /// \param[in] len Number of bytes in the tbuf buffer, and the number of bytes to send |
---|
1135 | extern void bcm2835_spi_writenb(char* buf, uint32_t len); |
---|
1136 | |
---|
1137 | /// @} |
---|
1138 | |
---|
1139 | /// \defgroup i2c I2C access |
---|
1140 | /// These functions let you use I2C (The Broadcom Serial Control bus with the Philips |
---|
1141 | /// I2C bus/interface version 2.1 January 2000.) to interface with an external I2C device. |
---|
1142 | /// @{ |
---|
1143 | |
---|
1144 | /// Start I2C operations. |
---|
1145 | /// Forces RPi I2C pins P1-03 (SDA) and P1-05 (SCL) |
---|
1146 | /// to alternate function ALT0, which enables those pins for I2C interface. |
---|
1147 | /// You should call bcm2835_i2c_end() when all I2C functions are complete to return the pins to |
---|
1148 | /// their default functions |
---|
1149 | /// \sa bcm2835_i2c_end() |
---|
1150 | extern void bcm2835_i2c_begin(void); |
---|
1151 | |
---|
1152 | /// End I2C operations. |
---|
1153 | /// I2C pins P1-03 (SDA) and P1-05 (SCL) |
---|
1154 | /// are returned to their default INPUT behaviour. |
---|
1155 | extern void bcm2835_i2c_end(void); |
---|
1156 | |
---|
1157 | /// Sets the I2C slave address. |
---|
1158 | /// \param[in] addr The I2C slave address. |
---|
1159 | extern void bcm2835_i2c_setSlaveAddress(uint8_t addr); |
---|
1160 | |
---|
1161 | /// Sets the I2C clock divider and therefore the I2C clock speed. |
---|
1162 | /// \param[in] divider The desired I2C clock divider, one of BCM2835_I2C_CLOCK_DIVIDER_*, |
---|
1163 | /// see \ref bcm2835I2CClockDivider |
---|
1164 | extern void bcm2835_i2c_setClockDivider(uint16_t divider); |
---|
1165 | |
---|
1166 | /// Sets the I2C clock divider by converting the baudrate parameter to |
---|
1167 | /// the equivalent I2C clock divider. ( see \sa bcm2835_i2c_setClockDivider) |
---|
1168 | /// For the I2C standard 100khz you would set baudrate to 100000 |
---|
1169 | /// The use of baudrate corresponds to its use in the I2C kernel device |
---|
1170 | /// driver. (Of course, bcm2835 has nothing to do with the kernel driver) |
---|
1171 | extern void bcm2835_i2c_set_baudrate(uint32_t baudrate); |
---|
1172 | |
---|
1173 | /// Transfers any number of bytes to the currently selected I2C slave. |
---|
1174 | /// (as previously set by \sa bcm2835_i2c_setSlaveAddress) |
---|
1175 | /// \param[in] buf Buffer of bytes to send. |
---|
1176 | /// \param[in] len Number of bytes in the buf buffer, and the number of bytes to send. |
---|
1177 | /// \return reason see \ref bcm2835I2CReasonCodes |
---|
1178 | extern uint8_t bcm2835_i2c_write(const char * buf, uint32_t len); |
---|
1179 | |
---|
1180 | /// Transfers any number of bytes from the currently selected I2C slave. |
---|
1181 | /// (as previously set by \sa bcm2835_i2c_setSlaveAddress) |
---|
1182 | /// \param[in] buf Buffer of bytes to receive. |
---|
1183 | /// \param[in] len Number of bytes in the buf buffer, and the number of bytes to received. |
---|
1184 | /// \return reason see \ref bcm2835I2CReasonCodes |
---|
1185 | extern uint8_t bcm2835_i2c_read(char* buf, uint32_t len); |
---|
1186 | |
---|
1187 | /// Allows reading from I2C slaves that require a repeated start (without any prior stop) |
---|
1188 | /// to read after the required slave register has been set. For example, the popular |
---|
1189 | /// MPL3115A2 pressure and temperature sensor. Note that your device must support or |
---|
1190 | /// require this mode. If your device does not require this mode then the standard |
---|
1191 | /// combined: |
---|
1192 | /// \sa bcm2835_i2c_write |
---|
1193 | /// \sa bcm2835_i2c_read |
---|
1194 | /// are a better choice. |
---|
1195 | /// Will read from the slave previously set by \sa bcm2835_i2c_setSlaveAddress |
---|
1196 | /// \param[in] regaddr Buffer containing the slave register you wish to read from. |
---|
1197 | /// \param[in] buf Buffer of bytes to receive. |
---|
1198 | /// \param[in] len Number of bytes in the buf buffer, and the number of bytes to received. |
---|
1199 | /// \return reason see \ref bcm2835I2CReasonCodes |
---|
1200 | extern uint8_t bcm2835_i2c_read_register_rs(char* regaddr, char* buf, uint32_t len); |
---|
1201 | |
---|
1202 | /// Allows sending an arbitrary number of bytes to I2C slaves before issuing a repeated |
---|
1203 | /// start (with no prior stop) and reading a response. |
---|
1204 | /// Necessary for devices that require such behavior, such as the MLX90620. |
---|
1205 | /// Will write to and read from the slave previously set by \sa bcm2835_i2c_setSlaveAddress |
---|
1206 | /// \param[in] cmds Buffer containing the bytes to send before the repeated start condition. |
---|
1207 | /// \param[in] cmds_len Number of bytes to send from cmds buffer |
---|
1208 | /// \param[in] buf Buffer of bytes to receive. |
---|
1209 | /// \param[in] buf_len Number of bytes to receive in the buf buffer. |
---|
1210 | /// \return reason see \ref bcm2835I2CReasonCodes |
---|
1211 | extern uint8_t bcm2835_i2c_write_read_rs(char* cmds, uint32_t cmds_len, char* buf, uint32_t buf_len); |
---|
1212 | |
---|
1213 | /// @} |
---|
1214 | |
---|
1215 | /// \defgroup st System Timer access |
---|
1216 | /// Allows access to and delays using the System Timer Counter. |
---|
1217 | /// @{ |
---|
1218 | |
---|
1219 | /// Read the System Timer Counter register. |
---|
1220 | /// \return the value read from the System Timer Counter Lower 32 bits register |
---|
1221 | extern uint64_t bcm2835_st_read(void); |
---|
1222 | |
---|
1223 | /// Delays for the specified number of microseconds with offset. |
---|
1224 | /// \param[in] offset_micros Offset in microseconds |
---|
1225 | /// \param[in] micros Delay in microseconds |
---|
1226 | extern void bcm2835_st_delay(uint64_t offset_micros, uint64_t micros); |
---|
1227 | |
---|
1228 | /// @} |
---|
1229 | |
---|
1230 | /// \defgroup pwm Pulse Width Modulation |
---|
1231 | /// Allows control of 2 independent PWM channels. A limited subset of GPIO pins |
---|
1232 | /// can be connected to one of these 2 channels, allowing PWM control of GPIO pins. |
---|
1233 | /// You have to set the desired pin into a particular Alt Fun to PWM output. See the PWM |
---|
1234 | /// documentation on the Main Page. |
---|
1235 | /// @{ |
---|
1236 | |
---|
1237 | /// Sets the PWM clock divisor, |
---|
1238 | /// to control the basic PWM pulse widths. |
---|
1239 | /// \param[in] divisor Divides the basic 19.2MHz PWM clock. You can use one of the common |
---|
1240 | /// values BCM2835_PWM_CLOCK_DIVIDER_* in \ref bcm2835PWMClockDivider |
---|
1241 | extern void bcm2835_pwm_set_clock(uint32_t divisor); |
---|
1242 | |
---|
1243 | /// Sets the mode of the given PWM channel, |
---|
1244 | /// allowing you to control the PWM mode and enable/disable that channel |
---|
1245 | /// \param[in] channel The PWM channel. 0 or 1. |
---|
1246 | /// \param[in] markspace Set true if you want Mark-Space mode. 0 for Balanced mode. |
---|
1247 | /// \param[in] enabled Set true to enable this channel and produce PWM pulses. |
---|
1248 | extern void bcm2835_pwm_set_mode(uint8_t channel, uint8_t markspace, uint8_t enabled); |
---|
1249 | |
---|
1250 | /// Sets the maximum range of the PWM output. |
---|
1251 | /// The data value can vary between 0 and this range to control PWM output |
---|
1252 | /// \param[in] channel The PWM channel. 0 or 1. |
---|
1253 | /// \param[in] range The maximum value permitted for DATA. |
---|
1254 | extern void bcm2835_pwm_set_range(uint8_t channel, uint32_t range); |
---|
1255 | |
---|
1256 | /// Sets the PWM pulse ratio to emit to DATA/RANGE, |
---|
1257 | /// where RANGE is set by bcm2835_pwm_set_range(). |
---|
1258 | /// \param[in] channel The PWM channel. 0 or 1. |
---|
1259 | /// \param[in] data Controls the PWM output ratio as a fraction of the range. |
---|
1260 | /// Can vary from 0 to RANGE. |
---|
1261 | extern void bcm2835_pwm_set_data(uint8_t channel, uint32_t data); |
---|
1262 | |
---|
1263 | /// @} |
---|
1264 | #ifdef __cplusplus |
---|
1265 | } |
---|
1266 | #endif |
---|
1267 | |
---|
1268 | #endif // BCM2835_H |
---|
1269 | |
---|
1270 | /// @example blink.c |
---|
1271 | /// Blinks RPi GPIO pin 11 on and off |
---|
1272 | |
---|
1273 | /// @example input.c |
---|
1274 | /// Reads the state of an RPi input pin |
---|
1275 | |
---|
1276 | /// @example event.c |
---|
1277 | /// Shows how to use event detection on an input pin |
---|
1278 | |
---|
1279 | /// @example spi.c |
---|
1280 | /// Shows how to use SPI interface to transfer a byte to and from an SPI device |
---|
1281 | |
---|
1282 | /// @example spin.c |
---|
1283 | /// Shows how to use SPI interface to transfer a number of bytes to and from an SPI device |
---|
1284 | |
---|
1285 | /// @example pwm.c |
---|
1286 | /// Shows how to use PWM to control GPIO pins |
---|
1287 | |
---|
1288 | /// @example i2c.c |
---|
1289 | /// Command line utility for executing i2c commands with the |
---|
1290 | /// Broadcom bcm2835. Contributed by Shahrooz Shahparnia. |
---|
1291 | |
---|
1292 | /// example gpio.c |
---|
1293 | /// Command line utility for executing gpio commands with the |
---|
1294 | /// Broadcom bcm2835. Contributed by Shahrooz Shahparnia. |
---|