source: MML/trunk/machine/SOLEIL/StorageRing/diagnostics/fofb_read_CC_status.m @ 4

Last change on this file since 4 was 4, checked in by zhangj, 10 years ago

Initial import--MML version from SOLEIL@2013
File size: 4.4 KB
Line 
1function [CC_version,CC_status,lp1,lp2,lp3,lp4,status_RX1,status_RX2,status_RX3,status_RX4,status_TX1,status_TX2,status_TX3,status_TX4,time_frame_count,hard_error_cnt_1,hard_error_cnt_2,hard_error_cnt_3,hard_error_cnt_4,soft_error_cnt_1,soft_error_cnt_2,soft_error_cnt_3,soft_error_cnt_4,frame_error_cnt_1,frame_error_cnt_2,frame_error_cnt_3,frame_error_cnt_4,rx_pck_cnt_1,rx_pck_cnt_2,rx_pck_cnt_3,rx_pck_cnt_4,tx_pck_cnt_1,tx_pck_cnt_2,tx_pck_cnt_3,tx_pck_cnt_4]=configure_fofb(bpm)
2dev=bpm;
3CC_cfg=0;
4matrix_x=256*4;
5matrix_z=512*4;
6CC_status=768*4;
7fai_cfg_reg=2048*4;
8ack_rise=int32([fai_cfg_reg 4 1 9]);
9ack_fall=int32([fai_cfg_reg 4 1 8]);
10Disable_Itech_fai=int32([(fai_cfg_reg+4) 4 1 0]);
11Soft_stop=int32([(fai_cfg_reg+8) 4 1 0]);
12Reset_user_fai=int32([(fai_cfg_reg) 4 1 0]);
13Enable_user_fai=int32([(fai_cfg_reg) 4 1 10]);
14Enable_Itech_fai=int32([(fai_cfg_reg+4) 4 1 1]);
15
16switch mode
17    case 'read_RAM'
18        RAM_X_array=int32([matrix_x,4,256])
19        result=uint32(tango_command_inout2(dev,'ReadFAData',RAM_X_array))
20        for i=1:1:256
21            RAM_X(i)=result(i);
22        end
23        RAM_X
24       
25    case 'read'
26        CC_status_array=int32([CC_status,4,32])
27        result=uint32(tango_command_inout2(dev,'ReadFAData',CC_status_array))
28        addr=1;
29        CC_version= dec2hex(result(addr));
30        addr=addr+1;
31        CC_status=result(addr);
32        addr=addr+1;
33        lp1=result(addr);
34        addr=addr+1;
35        lp2=result(addr)
36        addr=addr+1;
37        lp3=result(addr);
38        addr=addr+1;
39        lp4=result(addr);
40        addr=addr+1;
41        link_up_down_status=dec2bin(result(addr),8)
42        status_RX1=link_up_down_status(8)
43        status_RX2=link_up_down_status(7)
44        status_RX3=link_up_down_status(6)
45        status_RX4=link_up_down_status(5)
46        status_TX1=link_up_down_status(4)
47        status_TX2=link_up_down_status(3)
48        status_TX3=link_up_down_status(2)
49        status_TX4=link_up_down_status(1)
50        addr=addr+1;
51        time_frame_count=result(addr);
52        addr=addr+1;
53        hard_error_cnt_1=result(addr);
54        addr=addr+1;
55        hard_error_cnt_2=result(addr);
56        addr=addr+1;
57        hard_error_cnt_3=result(addr);
58        addr=addr+1;
59        hard_error_cnt_4=result(addr);
60        addr=addr+1;
61        soft_error_cnt_1=result(addr);
62        addr=addr+1;
63        soft_error_cnt_2=result(addr);
64        addr=addr+1;
65        soft_error_cnt_3=result(addr);
66        addr=addr+1;
67        soft_error_cnt_4=result(addr);
68        addr=addr+1;
69        frame_error_cnt_1=result(addr);
70        addr=addr+1;
71        frame_error_cnt_2=result(addr);
72        addr=addr+1;
73        frame_error_cnt_3=result(addr);
74        addr=addr+1;
75        frame_error_cnt_4=result(addr);
76        addr=addr+1;
77        rx_pck_cnt_1=result(addr);
78        addr=addr+1;
79        rx_pck_cnt_2=result(addr);
80        addr=addr+1;
81        rx_pck_cnt_3=result(addr);
82        addr=addr+1;
83        rx_pck_cnt_4=result(addr);
84        addr=addr+1;
85        tx_pck_cnt_1=result(addr);
86        addr=addr+1;
87        tx_pck_cnt_2=result(addr);
88        addr=addr+1;
89        tx_pck_cnt_3=result(addr);
90        addr=addr+1;
91        tx_pck_cnt_4=result(addr);
92       
93        RAM_XZ_array=int32([matrix_x,4,512])
94        result_ram=uint32(tango_command_inout2(dev,'ReadFAData',RAM_XZ_array))
95        for i=1:1:256
96            RAM_X(i)=result_ram(i);
97
98        end
99        for i=1:1:256
100            RAM_Z(i)=result_ram((i+256));
101        end
102        RAM_X
103        RAM_Z
104             
105    case 'write'
106        switch commande
107             case 'init_CC'
108              conf_array=int16([CC_cfg 4 5 id 0 time_frame_lenght 0 MGT_powerdown 0 MGT_loopback 0 buf_clr_dly 0]);
109              tango_command_inout2(dev,'WriteFAData',conf_array)
110              tango_command_inout2(dev,'WriteFAData',ack_rise)
111              tango_command_inout2(dev,'WriteFAData',ack_fall)
112            case 'stop_CC'
113               tango_command_inout2(dev,'WriteFAData',Disable_Itech_fai)
114               tango_command_inout2(dev,'WriteFAData',Soft_stop)
115               tango_command_inout2(dev,'WriteFAData',Reset_user_fai)
116            case 'arm_CC'
117                tango_command_inout2(dev,'WriteFAData',Enable_user_fai)
118               tango_command_inout2(dev,'WriteFAData',Enable_Itech_fai)
119            otherwise
120                display('command name is not valid')
121        end;
122    otherwise
123        display('mode is not valid')
124end;
125     
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